System registers

Memory layout

The IO::RAM_END_ADDRESS, IO::ROM_END_ADDRESS, and IO::IO_END_ADDRESS values report the size of the memory segments, which may very among models in the future.

CPU event handlers

The Chombit processor can encounter various CPU events such as attempts to access invalid memory addresses or special opcodes such as FAIL, REQUEST, or TRACE. Normally the Hybrix debugger will handle these events automatically. However, advanced programs can use the IO::CPU_ locations to intercept these events and handle them within the program. An example application would be a debugging tool that runs inside the Hybrix virtual machine program. Regular programs generally won't need this feature.

For details, see the CPU events documentation.

Product features

In the future Hybrix will support multiple virtual machine editions with different capabilities, identified by IO::PRODUCT_FEATURES.

Stack guard

The IO::STACK_GUARD location enables the stack fault safeguard for PUSH, GPUSH, and ADD SP instructions.

Kernel globals

The memory range $D0_0080 – $D0_00BF is reserved for usage by the kernel assembly language. Typically it stores the stack and heap boundaries as IO::KERNEL_HEAP_START_ADDRESS, IO::KERNEL_STACK_START_ADDRESS, and IO::KERNEL_STACK_END_ADDRESS.

I/O definitions

MODULE IO
  # MEMORY SEGMENT LAYOUT
  VAR RAM_END_ADDRESS: INT                    LOCATED AT $D0_0000 # 001X_XXXX
  VAR ROM_END_ADDRESS: INT                    LOCATED AT $D0_0004 # 00CX_XXXX
  VAR IO_END_ADDRESS: INT                     LOCATED AT $D0_0008 # 00DX_XXXX

  # USED WITH SLEEP_UNTIL_IRQ BELOW.  WHENEVER THE SPECIFIED EVENT OCCURS,
  # THE HARDWARE SETS THE CORRESPONDING BIT.  THE PROGRAM CAN CLEAR A BIT
  # BY SETTING IT (THE "WRITE 1 TO CLEAR" OR "W1C" CONVENTION).
  # +1 = WHENEVER PALIX PAINTS A VIDEO FRAME (BUFFERED OR UNBUFFERED)
  # +2 = WHENEVER JAMDAC ADVANCES AN IO_AUDIO_QUEUE::READ_ADDRESS
  VAR IRQ_PENDING: BYTE                       LOCATED AT $D0_0010

  # TO SAVE ELECTRICITY, THE CPU CAN BE TEMPORARY PAUSED BY ASSIGNING A
  # NONZERO MASK TO SLEEP_UNTIL_IRQ.  THE CPU WILL WAKE UP AGAIN WHEN
  # IRQ_PENDING MATCHES ANY OF THE MASKED BITS (LEVEL TRIGGERING).
  VAR SLEEP_UNTIL_IRQ: BYTE                   LOCATED AT $D0_0012

  # CUSTOM HANDLING FOR "FAIL", "TRACE", "REQUEST" AND OTHER CPU EVENTS
  VAR CPU_EVENT_FLAGS: BYTE                   LOCATED AT $D0_0013
  VAR CPU_EVENT_IP: INT                       LOCATED AT $D0_0014
  VAR CPU_EVENT_FP: INT                       LOCATED AT $D0_0018
  VAR CPU_EVENT_VALUE: INT                    LOCATED AT $D0_001C
  VAR CPU_FAIL_HANDLER: INT                   LOCATED AT $D0_0020
  VAR CPU_TRACE_HANDLER: INT                  LOCATED AT $D0_0024
  VAR CPU_REQUEST_HANDLER: INT                LOCATED AT $D0_0028
  . . .
  # +1 = FLOATING POINT ADD-ON
  VAR PRODUCT_FEATURES: BYTE                  LOCATED AT $D0_003C

  # 0 = DISABLED; 1 = STACK FAULT WHEN SP > GP
  VAR STACK_GUARD: BYTE                       LOCATED AT $D0_003D
  . . .
  # $D0_0080 - $D0_00BF ARE RESERVED FOR KERNEL GLOBALS
  VAR KERNEL_HEAP_START_ADDRESS: INT          LOCATED AT $D0_0080
  # CONVENTIONALLY, THE HEAP END IS THE STACK START
  VAR KERNEL_STACK_START_ADDRESS: INT         LOCATED AT $D0_0084
  VAR KERNEL_STACK_END_ADDRESS: INT           LOCATED AT $D0_0088
  . . .
END MODULE