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SHIFT

Perform a logical or arithmetic shift of the operand's value.

OpcodeBytesCyclesFormExample
$7033SHIFT LEFT B:_, {S_BYTE}SHIFT LEFT B:1, 123
$7033SHIFT RIGHT UNSIGNED B:_, {S_BYTE}SHIFT RIGHT UNSIGNED B:1, 123
$7033SHIFT RIGHT SIGNED B:_, {S_BYTE}SHIFT RIGHT SIGNED B:1, 123
$7133SHIFT LEFT P:_, {S_BYTE}SHIFT LEFT P:2, 123
$7133SHIFT RIGHT UNSIGNED P:_, {S_BYTE}SHIFT RIGHT UNSIGNED P:2, 123
$7133SHIFT RIGHT SIGNED P:_, {S_BYTE}SHIFT RIGHT SIGNED P:2, 123
$7233SHIFT LEFT I:_, {S_BYTE}SHIFT LEFT I:4, 123
$7233SHIFT RIGHT UNSIGNED I:_, {S_BYTE}SHIFT RIGHT UNSIGNED I:4, 123
$7233SHIFT RIGHT SIGNED I:_, {S_BYTE}SHIFT RIGHT SIGNED I:4, 123
$7333SHIFT LEFT I:_, I:_SHIFT LEFT I:4, I:8
$7433SHIFT RIGHT UNSIGNED I:_, I:_SHIFT RIGHT UNSIGNED I:4, I:8
$7533SHIFT RIGHT SIGNED I:_, I:_SHIFT RIGHT SIGNED I:4, I:8
Condition flagOutput
zero (ZF)If the result is zero, this flag is 1; otherwise it is 0.*
negative (NF)This flag is updated with the highest bit of the result.*
overflow (OF)This flag is not affected by SHIFT.
carry (CF)This flag is always updated with the last bit that was shifted out.*

* Except when the shift count is zero; see below.

Notes

  • The result is stored back into the same operand.

  • SHIFT LEFT I:4, 1 is a fast and compact way to multiply by 2.

  • SHIFT RIGHT SIGNED I:4, 1 or SHIFT RIGHT UNSIGNED I:4, 1 is a fast and compact way to divide by 2.

  • For constant shifts, the same opcode appears in multiple rows of the table above. This is because the shift variant is encoded in the same operand byte that stores the shift count:

    Operand byte
    (binary)
    Shift variantOperation
    00xx_xxxxSHIFT LEFT logical shift left (LSL)
    01xx_xxxxSHIFT RIGHT UNSIGNED logical shift right (LSR)
    10xx_xxxxSHIFT RIGHT SIGNED arithmetic shift right (ASR)
  • The shift count is stored in the low bits of this operand byte. For example, SHIFT LEFT , 3 has an operand byte $03, whereas SHIFT RIGHT SIGNED , 3 has an operand byte $83. If any other bits are set, the behavior is undefined; typically those bits are ignored.

  • If the shift count is zero, no operation is performed, and the flags are unchanged, but the instruction still requires 3 clock cycles. This behavior is typical of most CPUs.

  • Chombit does not currently support circular shift variants such as rotate right (ROR) or rotate right with extend (RRX), as they are rarely needed except in specialized optimizations. They may be introduced in the future, however.