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Jamdac architecture

Internally, the Jamdac audio synthesizer has three main components:

  • Audio memory: 64 kilobytes of high speed random access memory (RAM) used for audio buffers and storing the synthesizer's internal state.
  • DSP unit: This is an application-specific integrated circuit (ASIC) that implements the Jamdac's DSP pipeline to efficiently generate audio samples. It can access the audio memory, but cannot access main memory segments such as RAM, ROM, or I/O.
  • Event coprocessor: This is a second Chombit CPU that runs a small firmware ROM. The firmware reads inputs from IO::AUDIO_QUEUES and writes output to the audio memory. For example, to process a LOAD INSTRUMENT command, the coprocessor copies the IO_INSTRUMENT object into audio memory.

The system is fully deterministic, which means that if you run the same program twice with the same event queue inputs, the audio output is guaranteed to be identical.