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Jamdac architecture

Internally, the Jamdac audio synthesizer has three main components:

  • Audio memory: 64 kilobytes of high speed random access memory (RAM) used for audio buffers and storing the synthesizer's internal state.
  • DSP unit: This is an application-specific integrated circuit (ASIC) that implements the Jamdac's DSP pipeline to efficiently generate audio samples. It can access the audio memory, but cannot access main memory regions such as RAM, ROM, or I/O.
  • Event coprocessor: This is a second Chombit CPU that runs a small firmware ROM. The firmware reads inputs from io::audio_queues and writes output to the audio memory. For example, to process a LOAD INSTRUMENT command, the coprocessor copies the io_instrument object into audio memory.

The system is fully deterministic, which means that if you run the same program twice with the same event queue inputs, the audio output is guaranteed to be identical.

Jamdac core and non-core features​

Jamdac's feature set is conceptually separated into its core (the smallest complete synthesizer) plus a collection of non-core enhancements and programming conveniences, which are marked as [non-core] in the framework file.

The Jamdac core is self-contained: each channel's sound depends only on that channel's own events, and each note is fully determined at the moment it is triggered. The non-core features either enrich the sound or make programming easier. The digitar's resonating strings, the channel effect's delay and distortion, and the global reverb are enrichments. Sustain, release, rampdown, and global envelopes are conveniences: they enable a note to respond to events that arrive after it starts playing, which the core achieves instead by scheduling the note's entire life in advance.

Composers who enjoy a challenge may choose to write music using only the core.